Performance of the Xilinx Zynq System-on-Chip Interconnect with Asymmetric Multiprocessing
Genre
Thesis/DissertationDate
2014Author
Powell, Andrew AndreAdvisor
Silage, DennisCommittee member
Helferty, John J.Nguyen, Son
Kwatny, Eugene
Department
Electrical and Computer EngineeringPermanent link to this record
http://hdl.handle.net/20.500.12613/3419