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    The Design, Simulation and Synthesis of Pipelined Floating-Point Radix-4 Fast Fourier Transform Data Path in VHDL

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    Genre
    Thesis/Dissertation
    Date
    2010
    Author
    Nicklous, Francis Edward
    Advisor
    Sendaula, Musoke H.
    Committee member
    Biswas, Saroj K.
    Silage, Dennis
    Chiang, Chen Huan
    Department
    Electrical and Computer Engineering
    Subject
    Engineering, Electronics and Electrical
    Computer Engineering
    Fft
    Floating-point
    Pipeline
    Radix
    Synthesis
    Vhdl
    Permanent link to this record
    http://hdl.handle.net/20.500.12613/2014
    
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    DOI
    http://dx.doi.org/10.34944/dspace/1996
    Abstract
    The Fast Fourier Transform (FFT) converts time or spatial information into the frequency domain. The FFT is one of the most widely used digital signal processing (DSP) algorithms. DSPs are used in a number of applications from communication and controls to speech and image processing. DSPs have also found their way into toys, music synthesizers and in most digital instruments. Many applications have relied on Digital Signal Processors and Application Specific Integrated Circuits (ASIC) for most of the signal processing needs. DSPs provide an adequate means of performance and efficiency for many applications as well as robust tools to ease the development process. However, the requirements of important emerging DSP applications have begun to exceed the capabilities of DSPs. With this in mind, system developers have begun to consider alternatives such as ASICs and Field Programmable Gate Arrays (FPGA). Although ASICs can provide excellent performance and efficiency, the time, cost and risk associated with the design of ASICs is leading developers towards FPGAs. A number of significant advances in FPGA technology have improved the suitability of FPGAs for DSP applications. These advances include increased device capacity and speed, DSP-oriented architectural enhancements, better DSP-oriented tools, and increasing availability of DSP-oriented IP libraries. The thesis research focuses on the design of a single precision floating-point radix-4 FFT FPGA using VHDL for real time DSP applications. The paper will go into further detail pertaining to the FFT algorithm used, the description of the design steps taken as well as the results from both simulation and synthesis.
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